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The ARM710 is a CPU designed by ARM Ltd, and originally released in 1994. It was used in the RiscPC.


The ARM710 integrates an ARM7 CPU code, MMU, 8 kB of cache and 8 entry write buffer. The CPU core supports 26 and 32 bit modes, and implements the ARMv3 instruction set. It uses a 3 stage pipeline similar to earlier ARM CPUs. It is very similar to the older ARM6 core, but can run below 5V.


Two variants were used in the RiscPC, the ARM710 and ARM710a. The primary difference is that the former chip uses 32 byte cache lines, while the latter reverts to 16 byte lines as used by older CPUs. The ARM710 can provide slightly more memory bandwidth, but cache misses have higher latency than on the 710a.

Additionally, when RISC OS detects an original 710 is in use, it will disable ROM burst accesses. This reduces available ROM bandwidth and can slightly affect performance.